Design of a baseband processor for software radio using FPGAs

Ferney Amaya-Fernández, Jaime Velasco-Medina

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

This article presents the design of a baseband processor for software radio, which uses carrier synchronizer and bit detector-synchronizer circuits based on algorithms implemented in hardware, and an inverse tangent circuit based on the CORDIC algorithm. In this case, the functional blocks of the processor can be reconfigured to support multiple modulation formats and signal processing tasks in the digital domain.

Original languageEnglish
Title of host publication2008 IEEE International SOC Conference, SOCC
Pages315-318
Number of pages4
DOIs
StatePublished - 2008
Externally publishedYes
Event2008 IEEE International SOC Conference, SOCC - Newport Beach, CA, United States
Duration: 17 Sep 200820 Sep 2008

Publication series

Name2008 IEEE International SOC Conference, SOCC

Conference

Conference2008 IEEE International SOC Conference, SOCC
Country/TerritoryUnited States
CityNewport Beach, CA
Period17/09/0820/09/08

Fingerprint

Dive into the research topics of 'Design of a baseband processor for software radio using FPGAs'. Together they form a unique fingerprint.

Cite this